diff --git a/Modules/pci/kpci.h b/Modules/pci/kpci.h --- a/Modules/pci/kpci.h +++ b/Modules/pci/kpci.h @@ -1,7 +1,7 @@ /* Retrieve information about PCI subsystem through libpci library from pciutils package. This should be possible on Linux, BSD and AIX. - Author: Konrad Rzepecki + Author: Konrad Rzepecki */ #ifndef KCONTROL_KPCI_H diff --git a/Modules/pci/kpci.cpp b/Modules/pci/kpci.cpp --- a/Modules/pci/kpci.cpp +++ b/Modules/pci/kpci.cpp @@ -7,7 +7,7 @@ here, since there are only few of them, and they are important and should their names be translated. - Author: Konrad Rzepecki + Author: Konrad Rzepecki */ #include "kpci_private.h" @@ -60,7 +60,7 @@ static QTreeWidgetItem* addDeviceClass(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { QString value; - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; after=create(parent, i18n("Device Class"), getNameById(devClass, info->cooked.devClass)+value.sprintf(" (0x%02X)", info->cooked.devClass)); after=create(parent, i18n("Device Subclass"), getNameBy2Id(devSubclass, info->cooked.devClass, info->cooked.devSubClass)+value.sprintf(" (0x%02X)", info->cooked.devSubClass)); after=create(parent, i18n("Device Programming Interface"), getNameBy3Id(devInterface, info->cooked.devClass, info->cooked.devSubClass, info->cooked.devProgIface.devProgIface)+value.sprintf(" (0x%02X)", info->cooked.devProgIface.devProgIface)); @@ -91,14 +91,14 @@ }//else //WARNING all pci_lookup_name calls should have 4 extra args for compatibility with older pcilib ! - if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_VENDOR, info->cooked.vendor, 0, 0, 0)!=nullptr) { + if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_VENDOR, info->cooked.vendor, 0, 0, 0)!=nullptr) { // line.setAscii(nameBuffer); //not work, workaround below line = QString::fromLatin1(pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_VENDOR, info->cooked.vendor, 0, 0, 0)); if (line.contains(QStringLiteral("Unknown"))==0) { isVendor=true; topname=line; after=create(parent, i18n("Vendor"), line+value.sprintf(" (0x%04X)", info->cooked.vendor)); - if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_DEVICE, info->cooked.vendor, info->cooked.device, 0, 0)!=nullptr) { + if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_DEVICE, info->cooked.vendor, info->cooked.device, 0, 0)!=nullptr) { // line.setAscii(nameBuffer); //not work, workaround below line = QString::fromLatin1(pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_DEVICE, info->cooked.vendor, info->cooked.device, 0, 0)); if (line.contains(QStringLiteral("Unknown"))==0) { @@ -108,7 +108,7 @@ if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_BRIDGE) { isSub=true; }//if - else if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_DEVICE|PCI_LOOKUP_SUBSYSTEM, info->cooked.vendor, info->cooked.device, subvendor, subdevice)!=nullptr) { + else if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_DEVICE|PCI_LOOKUP_SUBSYSTEM, info->cooked.vendor, info->cooked.device, subvendor, subdevice)!=nullptr) { // line.setAscii(nameBuffer); //not work, workaround below line = QString::fromLatin1(pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_DEVICE|PCI_LOOKUP_SUBSYSTEM, info->cooked.vendor, info->cooked.device, subvendor, subdevice)); if (line.contains(QStringLiteral("Unknown"))==0) { @@ -128,7 +128,7 @@ topname=i18nc(strCtxt, strUnknown); }//if if ((!isSub)&&(info->cooked.headerType.headerType_bits.headerType!=PCI_HEADER_TYPE_BRIDGE)) { //if entire subsytem was not found, search at least for subvendor - if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_VENDOR, subvendor, 0, 0, 0)!=nullptr) { + if (pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_VENDOR, subvendor, 0, 0, 0)!=nullptr) { // line.setAscii(nameBuffer); //not work, workaround below line = QString::fromLatin1(pci_lookup_name(PCIAccess, nameBuffer, NAME_BUFFER_SIZE, PCI_LOOKUP_VENDOR, subvendor, 0, 0, 0)); if (line.contains(QStringLiteral("Unknown"))==0) { @@ -147,7 +147,7 @@ }//addVendor static QTreeWidgetItem* addInterrupt(QTreeWidgetItem *parent, QTreeWidgetItem *after, int irq, int pin) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; if ((irq!=0)||(pin!=0)) { after=createTitle(parent, i18n("Interrupt")); @@ -158,7 +158,7 @@ }//addInterrupt static QTreeWidgetItem* addControl(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; after=create(parent, i18n("Control"), value.sprintf("0x%04X", info->cooked.command.command)); localAfter=create(after, i18n("Response in I/O space"), (info->cooked.command.command_bits.comIo ? i18nc(strCtxt, strEnabled) : i18nc(strCtxt, strDisabled))); @@ -176,7 +176,7 @@ }//addControl static QTreeWidgetItem* addStatus(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; after=create(parent, i18n("Status"), value.sprintf("0x%04X", info->cooked.status.status)); localAfter=create(after, i18n("Interrupt status"), (info->cooked.status.status_bits.statCapList ? i18nc(strCtxt, strEnabled) : i18nc(strCtxt, strDisabled))); @@ -195,7 +195,7 @@ }//addStatus static QTreeWidgetItem* addLatency(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; after=create(parent, i18n("Latency"), value.sprintf("%u", info->cooked.latencyTimer)); if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_NORMAL) { @@ -216,7 +216,7 @@ }//addLatency static QTreeWidgetItem* addHeaderType(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; after=create(parent, i18n("Header"),value.sprintf("0x%02X",info->cooked.headerType.headerTypeFull)); localAfter=create(after, i18n("Type"),getNameById(headerType,info->cooked.headerType.headerType_bits.headerType)+value.sprintf(" (0x%02X)",info->cooked.headerType.headerType_bits.headerType)); @@ -225,7 +225,7 @@ }//addHeaderType static QTreeWidgetItem* addBist(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; after=create(parent, i18n("Build-in self test"), value.sprintf("0x%02X", info->cooked.bist.bist)); localAfter=create(after, i18n("BIST Capable"), (info->cooked.bist.bist_bits.bistCapable ? i18nc(strCtxt, strYes) : i18nc(strCtxt, strNo))); @@ -250,13 +250,13 @@ #ifdef HAVE_PCIADDR_T64 else if (size<0x10000000000LL) { - after=create(parent, i18n("Size"),QStringLiteral("%1 GiB").arg(static_cast(size/0x40000000))); + after=create(parent, i18n("Size"),QStringLiteral("%1 GiB").arg(static_cast(size/0x40000000))); }//elif else if (size<0x4000000000000LL) { - after=create(parent, i18n("Size"),QStringLiteral("%1 PiB").arg(static_cast(size/0x10000000000LL))); + after=create(parent, i18n("Size"),QStringLiteral("%1 PiB").arg(static_cast(size/0x10000000000LL))); }//elif else if (size<0x1000000000000000LL) { - after=create(parent, i18n("Size"),QStringLiteral("%1 EiB").arg(static_cast(size/0x4000000000000LL))); + after=create(parent, i18n("Size"),QStringLiteral("%1 EiB").arg(static_cast(size/0x4000000000000LL))); }//elif #else //HAVE_PCIADDR_T64 @@ -269,8 +269,8 @@ }//addSize static QTreeWidgetItem* addMapping(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info, pci_dev* PCIDevice) { - QTreeWidgetItem *localAfter=nullptr; - QTreeWidgetItem *topLocalAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *topLocalAfter=nullptr; QString value; bool is64b=false; after=createTitle(parent, i18n("Address mappings")); @@ -320,7 +320,7 @@ }//addMapping static QTreeWidgetItem* addBus(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_BRIDGE) { after=createTitle(parent, i18n("Bus")); @@ -340,7 +340,7 @@ }//addBus static QTreeWidgetItem* addSecStatus(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_BRIDGE) { after=create(parent, i18n("Secondary status"), value.sprintf("0x%04X", info->cooked.header.header1.secStatus.secStatus)); @@ -356,7 +356,7 @@ localAfter=create(after, i18n("Received master abort"),(info->cooked.header.header1.secStatus.secStatus_bits.secStatRecMasterAbort?i18nc(strCtxt, strYes):i18nc(strCtxt, strNo))); localAfter=create(after, i18n("Signaled system error"),(info->cooked.header.header1.secStatus.secStatus_bits.secStatSigSystemError?i18nc(strCtxt, strYes):i18nc(strCtxt, strNo))); localAfter=create(after, i18n("Parity error"),(info->cooked.header.header1.secStatus.secStatus_bits.secStatDetectedParity?i18nc(strCtxt, strYes):i18nc(strCtxt, strNo))); - }//if + }//if else if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_CARDBUS) { //should be checked after=create(parent,i18n("Secondary status"),value.sprintf("0x%04X",info->cooked.header.header2.cbSecStatus.cbSecStatus)); localAfter=create(after, i18n("Interrupt status"),(info->cooked.header.header2.cbSecStatus.cbSecStatus_bits.cbSecStatCapList?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); @@ -371,12 +371,12 @@ localAfter=create(after, i18n("Received master abort"),(info->cooked.header.header2.cbSecStatus.cbSecStatus_bits.cbSecStatRecMasterAbort?i18nc(strCtxt, strYes):i18nc(strCtxt, strNo))); localAfter=create(after, i18n("Signaled system error"),(info->cooked.header.header2.cbSecStatus.cbSecStatus_bits.cbSecStatSigSystemError?i18nc(strCtxt, strYes):i18nc(strCtxt, strNo))); localAfter=create(after, i18n("Parity error"),(info->cooked.header.header2.cbSecStatus.cbSecStatus_bits.cbSecStatDetectedParity?i18nc(strCtxt, strYes):i18nc(strCtxt, strNo))); - }//elif + }//elif return after; }//addSecStatus static QTreeWidgetItem* addBridgeBehind(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_BRIDGE) { after=createTitle(parent, i18n("I/O behind bridge")); @@ -402,12 +402,12 @@ localAfter=create(after, i18n("Base"),value.sprintf("0x%08X%08X",info->cooked.header.header1.prefBaseUpper32,(info->cooked.header.header1.prefMemoryBase.prefMemoryBase<<16)&0xFFFFFFF0)); localAfter=create(after, i18n("Limit"),value.sprintf("0x%0x8X%08X",info->cooked.header.header1.prefLimitUpper32,(info->cooked.header.header1.prefMemoryLimit<<16)|0x0FFFFF)); }//else - }//if + }//if return after; }//addBridgeBechind static QTreeWidgetItem* addBridgeControl(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_BRIDGE) { after=create(parent, i18n("Bridge control"),value.sprintf("0x%04X",info->cooked.header.header1.bridgeControl.bridgeControl)); @@ -422,12 +422,12 @@ localAfter=create(after, i18n("Secondary discard timer counts"),(info->cooked.header.header1.bridgeControl.bridgeControl_bits.bridgeControlSecDisTim?i18n("2e10 PCI clocks"):i18n("2e15 PCI clocks"))); localAfter=create(after, i18n("Discard timer error"),(info->cooked.header.header1.bridgeControl.bridgeControl_bits.bridgeControlDisTimStat?i18nc(strCtxt, strYes):i18nc(strCtxt, strNo))); localAfter=create(after, i18n("Discard timer system error"),(info->cooked.header.header1.bridgeControl.bridgeControl_bits.bridgeControlDisTimeSerr?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); - }//if + }//if return after; }//addBridgeControl static QTreeWidgetItem* addRom(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info, pci_dev* PCIDevice) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; if ((info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_NORMAL)||(info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_BRIDGE)) { after=createTitle(parent, i18n("Expansion ROM")); @@ -445,8 +445,8 @@ }//addRom static QTreeWidgetItem* addCardbusResource(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; - QTreeWidgetItem *topLocalAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *topLocalAfter=nullptr; QString value; int pref=0; if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_CARDBUS) { @@ -477,7 +477,7 @@ }//addCardbusResource static QTreeWidgetItem* addCardbusControl(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; if (info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_CARDBUS) { after=create(parent, i18n("CardBus control"),value.sprintf("0x%04X",info->cooked.header.header2.cbControl.cbControl)); @@ -490,12 +490,12 @@ localAfter=create(after, i18n("Window 0 prefetchable memory"),(info->cooked.header.header2.cbControl.cbControl_bits.cbControlPref0?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); localAfter=create(after, i18n("Window 1 prefetchable memory"),(info->cooked.header.header2.cbControl.cbControl_bits.cbControlPref1?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); localAfter=create(after, i18n("Post writes"),(info->cooked.header.header2.cbControl.cbControl_bits.cbControlPostWrites?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); - }//if + }//if return after; }//addCardbusControl static QTreeWidgetItem* addRaw(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value, temp; after=createTitle(parent, i18n("Raw PCI config space")); for (int i=0; i<(getuid()==0 ? 16 : 4); i++) { @@ -513,8 +513,8 @@ }//addRaw static QTreeWidgetItem* addCapsPm(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info, int offset) { - QTreeWidgetItem *localAfter=nullptr; - QTreeWidgetItem *subLocalAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *subLocalAfter=nullptr; QString value; pmInfo infoPm; if ((offset+2+sizeof(pmInfo))<256) { @@ -532,7 +532,7 @@ subLocalAfter=create(localAfter, i18n("D2"),(infoPm.cooked.caps.caps_bits.capsPmeD2?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); subLocalAfter=create(localAfter, i18n("D3 hot"),(infoPm.cooked.caps.caps_bits.capsPmeD3hot?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); subLocalAfter=create(localAfter, i18n("D3 cold"),(infoPm.cooked.caps.caps_bits.capsPmeD3cold?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); - localAfter=nullptr; + localAfter=nullptr; after=create(parent, i18n("Status"),value.sprintf("0x%04X",infoPm.cooked.status.status)); localAfter=create(after, i18n("Power state"),getNameById(powerState,infoPm.cooked.status.status_bits.statPower)); localAfter=create(after, i18n("Power management"),(infoPm.cooked.status.status_bits.statPme?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); @@ -540,7 +540,7 @@ localAfter=create(after, i18n("Data scale"),QString::number(infoPm.cooked.status.status_bits.statDataScale)); localAfter=create(after, i18n("Power management status"),(infoPm.cooked.status.status_bits.statPmeStat?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); if ((info->cooked.devClass==0x06)&&(info->cooked.devSubClass==0x04)) { //PCI bridge - subLocalAfter=nullptr; + subLocalAfter=nullptr; localAfter=create(after, i18n("Bridge status"),value.sprintf("0x%02X",infoPm.cooked.statusBridge.statusBridge)); subLocalAfter=create(localAfter, i18n("Secondary bus state in D3 hot"),(infoPm.cooked.statusBridge.statusBridge_bits.statBridgeBx?i18n("B2"):i18n("B3"))); subLocalAfter=create(localAfter, i18n("Secondary bus power & clock control"),(infoPm.cooked.statusBridge.statusBridge_bits.statBridgeClock?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); @@ -551,7 +551,7 @@ }//addCapsPm static QTreeWidgetItem* addCapsAgp(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info, int offset) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; agpInfo infoAgp; int i, cycleSize; @@ -579,7 +579,7 @@ localAfter=create(after, i18n("Isochronous transactions"),(infoAgp.cooked.status.status_bits1.statusIsochSupp?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); }//if localAfter=create(after, i18n("Maximum number of AGP command"),value.sprintf("%i (0x%02X)",infoAgp.cooked.status.status_bits1.statusReq+1,infoAgp.cooked.status.status_bits1.statusReq)); - localAfter=nullptr; + localAfter=nullptr; after=create(parent, i18n("Configuration"),value.sprintf("0x%08X",infoAgp.cooked.config.config)); localAfter=create(after, i18n("Rate"),getNameById(agpRate,infoAgp.cooked.config.config_bits0.configEnhRate)); localAfter=create(after, i18n("Fast Writes"),(infoAgp.cooked.config.config_bits1.configFastWrite?i18nc(strCtxt, strEnabled):i18nc(strCtxt, strDisabled))); @@ -614,7 +614,7 @@ }//addCapsVpd static QTreeWidgetItem* addCapsMsi(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info, int offset) { - QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; QString value; msiInfo infoMsi; int size=10; @@ -675,8 +675,8 @@ }//addCapsVendor static QTreeWidgetItem* addCaps(QTreeWidgetItem *parent, QTreeWidgetItem *after, pciInfo *info) { - QTreeWidgetItem *localAfter=nullptr; - QTreeWidgetItem *topLocalAfter=nullptr; + QTreeWidgetItem *localAfter=nullptr; + QTreeWidgetItem *topLocalAfter=nullptr; QString value; unsigned char offset; if ((info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_NORMAL)||(info->cooked.headerType.headerType_bits.headerType==PCI_HEADER_TYPE_BRIDGE)) { @@ -724,20 +724,20 @@ headers << i18n("Information") << i18n("Value"); tree->setHeaderLabels(headers); tree->setRootIsDecorated(true); - - pci_access *PCIAccess=nullptr; - pci_dev *PCIDevice=nullptr; + + pci_access *PCIAccess=nullptr; + pci_dev *PCIDevice=nullptr; //init libpci PCIAccess=pci_alloc(); - if (PCIAccess==nullptr) { + if (PCIAccess==nullptr) { return false; }//if pci_init(PCIAccess); pci_scan_bus(PCIAccess); - QTreeWidgetItem *DeviceName=nullptr, *after=nullptr; + QTreeWidgetItem *DeviceName=nullptr, *after=nullptr; QString value; pciInfo info; @@ -757,7 +757,7 @@ //create device tree DeviceName=new QTreeWidgetItem(tree, deviceList); //adding class, subclass and programming interface info - after=addDeviceClass(DeviceName, nullptr, &info); + after=addDeviceClass(DeviceName, nullptr, &info); //adding revision after=create(DeviceName, i18n("Revision"), value.sprintf("0x%02X", info.cooked.revision)); diff --git a/Modules/pci/kpci_private.h b/Modules/pci/kpci_private.h --- a/Modules/pci/kpci_private.h +++ b/Modules/pci/kpci_private.h @@ -7,7 +7,7 @@ pci.cpp private header, don't include in other files. - Author: Konrad Rzepecki + Author: Konrad Rzepecki */ #ifndef KCONTROL_KPCI_PRIVATE_H #define KCONTROL_KPCI_PRIVATE_H @@ -45,6 +45,15 @@ QString name; }; +/* Following structurs MUST BE packed, otherwise variables will be mapped to + wrong places. Q_PACKED macro seems not work very well. `#pragma pack` are + more widely adopted, and should be ignored if not supported. + + TODO: It will be good to check if structure was packed by compiler, and + disable this module entirely if not. +*/ +#pragma pack(push, 1) + union pciInfo { unsigned char raw[256]; struct { @@ -182,7 +191,7 @@ } secStatus Q_PACKED; union { unsigned short memoryBase; - struct { + struct { unsigned memoryType:1; unsigned memoryUnk:3; unsigned memoryAddr:4; @@ -191,7 +200,7 @@ unsigned short memoryLimit; union { unsigned short prefMemoryBase; - struct { + struct { unsigned prefMemoryType:1; unsigned prefMemoryUnk:3; unsigned prefMemoryAddr:4; @@ -424,7 +433,7 @@ } address Q_PACKED; struct { unsigned short msiData; - unsigned short msiUnk; + unsigned short msiUnk; unsigned msiMask; unsigned msiPending; } data Q_PACKED; @@ -432,350 +441,387 @@ } cooked Q_PACKED; } Q_PACKED; +#pragma pack(pop) + //In following arrays -1 mean default value //keep -1 in last position //device classes list static const id2name devClass[]={{ 0x00, i18n("Unclassified device")}, - { 0x01, i18n("Mass storage controller")}, - { 0x02, i18n("Network controller")}, - { 0x03, i18n("Display controller")}, - { 0x04, i18n("Multimedia controller")}, - { 0x05, i18n("Memory controller")}, - { 0x06, i18n("Bridge")}, - { 0x07, i18n("Communication controller")}, - { 0x08, i18n("Generic system peripheral")}, - { 0x09, i18n("Input device controller")}, - { 0x0A, i18n("Docking station")}, - { 0x0B, i18n("Processor")}, - { 0x0C, i18n("Serial bus controller")}, - { 0x0D, i18n("Wireless controller")}, - { 0x0E, i18n("Intelligent controller")}, - { 0x0F, i18n("Satellite communications controller")}, - { 0x10, i18n("Encryption controller")}, - { 0x11, i18n("Signal processing controller")}, - { -1, i18n("Unknown device class")} + { 0x01, i18n("Mass storage controller")}, + { 0x02, i18n("Network controller")}, + { 0x03, i18n("Display controller")}, + { 0x04, i18n("Multimedia controller")}, + { 0x05, i18n("Memory controller")}, + { 0x06, i18n("Bridge")}, + { 0x07, i18n("Communication controller")}, + { 0x08, i18n("Generic system peripheral")}, + { 0x09, i18n("Input device controller")}, + { 0x0A, i18n("Docking station")}, + { 0x0B, i18n("Processor")}, + { 0x0C, i18n("Serial bus controller")}, + { 0x0D, i18n("Wireless controller")}, + { 0x0E, i18n("Intelligent controller")}, + { 0x0F, i18n("Satellite communications controller")}, + { 0x10, i18n("Encryption controller")}, + { 0x11, i18n("Signal processing controller")}, + { 0x12, i18n("Processing accelerators")}, + { 0x13, i18n("Non-Essential Instrumentation")}, + { 0x13, i18n("Coprocessor")}, + { 0xFF, i18n("Unassigned class")}, + { -1, i18n("Unknown device class")} }; //keep -1 in last position in "id" //and in last position in "id2" with certain "id" //subdevice classes list static const id3name devSubclass[]={ { 0x00, 0x00, i18n("Non-VGA unclassified device")}, - { 0x00, 0x01, i18n("VGA unclassified device")}, - { 0x00, -1, i18n("Unknown unclassified device")}, - - { 0x01, 0x00, i18n("SCSI storage controller")}, - { 0x01, 0x01, i18n("IDE controller")}, - { 0x01, 0x02, i18n("Floppy disk controller")}, - { 0x01, 0x03, i18n("IPI bus controller")}, - { 0x01, 0x04, i18n("RAID bus controller")}, - { 0x01, 0x05, i18n("ATA controller")}, - { 0x01, 0x06, i18n("Serial ATA direct port access")}, - { 0x01, 0x80, i18n("Mass storage controller")}, - { 0x01, -1, i18n("Unknown storage controller")}, - - { 0x02, 0x00, i18n("Ethernet controller")}, - { 0x02, 0x01, i18n("Token ring network controller")}, - { 0x02, 0x02, i18n("FDDI network controller")}, - { 0x02, 0x03, i18n("ATM network controller")}, - { 0x02, 0x04, i18n("ISDN controller")}, - { 0x02, 0x05, i18n("WorldFip controller")}, - { 0x02, 0x06, i18n("PICMG 2.14 multi computing")}, - { 0x02, 0x80, i18n("Network controller")}, - { 0x02, -1, i18n("Unknown network controller")}, - - { 0x03, 0x00, i18n("VGA compatible controller")}, - { 0x03, 0x01, i18n("XGA compatible controller")}, - { 0x03, 0x02, i18n("3D controller")}, - { 0x03, 0x80, i18n("Display controller")}, - { 0x03, -1, i18n("Unknown display controller")}, - - { 0x04, 0x00, i18n("Multimedia video controller")}, - { 0x04, 0x01, i18n("Multimedia audio controller")}, - { 0x04, 0x02, i18n("Computer telephony device")}, - { 0x04, 0x80, i18n("Multimedia controller")}, - { 0x04, -1, i18n("Unknown multimedia controller")}, - - { 0x05, 0x00, i18n("RAM memory")}, - { 0x05, 0x01, i18n("FLASH memory")}, - { 0x05, 0x80, i18n("Memory controller")}, - { 0x05, -1, i18n("Unknown memory controller")}, - - { 0x06, 0x00, i18n("Host bridge")}, - { 0x06, 0x01, i18n("ISA bridge")}, - { 0x06, 0x02, i18n("EISA bridge")}, - { 0x06, 0x03, i18n("MicroChannel bridge")}, - { 0x06, 0x04, i18n("PCI bridge")}, - { 0x06, 0x05, i18n("PCMCIA bridge")}, - { 0x06, 0x06, i18n("NuBus bridge")}, - { 0x06, 0x07, i18n("CardBus bridge")}, - { 0x06, 0x08, i18n("RACEway bridge")}, - { 0x06, 0x09, i18n("Semi-transparent PCI-to-PCI bridge")}, - { 0x06, 0x0A, i18n("InfiniBand to PCI host bridge")}, - { 0x06, 0x80, i18n("Bridge")}, - { 0x06, -1, i18n("Unknown bridge")}, - - { 0x07, 0x00, i18n("Serial controller")}, - { 0x07, 0x01, i18n("Parallel controller")}, - { 0x07, 0x02, i18n("Multiport serial controller")}, - { 0x07, 0x03, i18n("Modem")}, - { 0x07, 0x04, i18n("GPIB (IEEE 488.1/2) controller")}, - { 0x07, 0x05, i18n("Smart card")}, - { 0x07, 0x80, i18n("Communication controller")}, - { 0x07, -1, i18n("Unknown communication controller")}, - - { 0x08, 0x00, i18n("PIC")}, - { 0x08, 0x01, i18n("DMA controller")}, - { 0x08, 0x02, i18n("Timer")}, - { 0x08, 0x03, i18n("RTC")}, - { 0x08, 0x04, i18n("PCI Hot-plug controller")}, - { 0x08, 0x80, i18n("System peripheral")}, - { 0x08, -1, i18n("Unknown system peripheral")}, - - { 0x09, 0x00, i18n("Keyboard controller")}, - { 0x09, 0x01, i18n("Digitizer Pen")}, - { 0x09, 0x02, i18n("Mouse controller")}, - { 0x09, 0x03, i18n("Scanner controller")}, - { 0x09, 0x04, i18n("Gameport controller")}, - { 0x09, 0x80, i18n("Input device controller")}, - { 0x09, -1, i18n("Unknown input device controller")}, - - { 0x0A, 0x00, i18n("Generic docking station")}, - { 0x0A, 0x80, i18n("Docking station")}, - { 0x0A, -1, i18n("Unknown docking station")}, - - { 0x0B, 0x00, i18n("386")}, - { 0x0B, 0x01, i18n("486")}, - { 0x0B, 0x02, i18n("Pentium")}, - { 0x0B, 0x10, i18n("Alpha")}, - { 0x0B, 0x20, i18n("Power PC")}, - { 0x0B, 0x30, i18n("MIPS")}, - { 0x0B, 0x40, i18n("Co-processor")}, - { 0x0B, -1, i18n("Unknown processor")}, - - { 0x0C, 0x00, i18n("FireWire (IEEE 1394)")}, - { 0x0C, 0x01, i18n("ACCESS bus")}, - { 0x0C, 0x02, i18n("SSA")}, - { 0x0C, 0x03, i18n("USB controller")}, - { 0x0C, 0x04, i18n("Fibre channel")}, - { 0x0C, 0x05, i18n("SMBus")}, - { 0x0C, 0x06, i18n("InfiniBand")}, - { 0x0C, 0x07, i18n("IPMI interface")}, - { 0x0C, 0x08, i18n("SERCOS interface")}, - { 0x0C, 0x09, i18n("CANbus")}, - { 0x0C, -1, i18n("Unknown serial bus controller")}, - - { 0x0D, 0x00, i18n("IRDA controller")}, - { 0x0D, 0x01, i18n("Consumer IR controller")}, - { 0x0D, 0x10, i18n("RF controller")}, - { 0x0D, 0x11, i18n("Bluetooth")}, - { 0x0D, 0x12, i18n("Broadband")}, - { 0x0D, 0x20, i18n("Ethernet (802.11a - 5 GHz)")}, - { 0x0D, 0x21, i18n("Ethernet (802.11b - 2.4 GHz)")}, - { 0x0D, 0x80, i18n("Wireless controller")}, - { 0x0D, -1, i18n("Unknown wireless controller")}, - - { 0x0E, 0x00, i18n("I2O")}, - { 0x0E, -1, i18n("Unknown intelligent controller")}, - - { 0x0F, 0x01, i18n("Satellite TV controller")}, - { 0x0F, 0x02, i18n("Satellite audio communication controller")}, - { 0x0F, 0x03, i18n("Satellite voice communication controller")}, - { 0x0F, 0x04, i18n("Satellite data communication controller")}, - { 0x0F, -1, i18n("Unknown satellite communications controller")}, - - { 0x10, 0x00, i18n("Network and computing encryption device")}, - { 0x10, 0x10, i18n("Entertainment encryption device")}, - { 0x10, 0x80, i18n("Encryption controller")}, - { 0x10, -1, i18n("Unknown encryption controller")}, - - { 0x11, 0x00, i18n("DPIO module")}, - { 0x11, 0x01, i18n("Performance counters")}, - { 0x11, 0x10, i18n("Communication synchronizer")}, - { 0x11, 0x20, i18n("Management card")}, - { 0x11, 0x80, i18n("Signal processing controller")}, - { 0x11, -1, i18n("Unknown signal processing controller")}, - - { -1, -1, i18n("Unknown subdevice class")} + { 0x00, 0x01, i18n("VGA unclassified device")}, + { 0x00, -1, i18n("Unknown unclassified device")}, + + { 0x01, 0x00, i18n("SCSI storage controller")}, + { 0x01, 0x01, i18n("IDE controller")}, + { 0x01, 0x02, i18n("Floppy disk controller")}, + { 0x01, 0x03, i18n("IPI bus controller")}, + { 0x01, 0x04, i18n("RAID bus controller")}, + { 0x01, 0x05, i18n("ATA controller")}, + { 0x01, 0x06, i18n("SATA controller")}, + { 0x01, 0x07, i18n("Serial Attached SCSI controller")}, + { 0x01, 0x08, i18n("Non-Volatile memory controller")}, + { 0x01, 0x80, i18n("Mass storage controller")}, + { 0x01, -1, i18n("Unknown storage controller")}, + + { 0x02, 0x00, i18n("Ethernet controller")}, + { 0x02, 0x01, i18n("Token ring network controller")}, + { 0x02, 0x02, i18n("FDDI network controller")}, + { 0x02, 0x03, i18n("ATM network controller")}, + { 0x02, 0x04, i18n("ISDN controller")}, + { 0x02, 0x05, i18n("WorldFip controller")}, + { 0x02, 0x06, i18n("PICMG controller")}, + { 0x02, 0x07, i18n("Infiniband controller")}, + { 0x02, 0x08, i18n("Fabric controller")}, + { 0x02, 0x80, i18n("Network controller")}, + { 0x02, -1, i18n("Unknown network controller")}, + + { 0x03, 0x00, i18n("VGA compatible controller")}, + { 0x03, 0x01, i18n("XGA compatible controller")}, + { 0x03, 0x02, i18n("3D controller")}, + { 0x03, 0x80, i18n("Display controller")}, + { 0x03, -1, i18n("Unknown display controller")}, + + { 0x04, 0x00, i18n("Multimedia video controller")}, + { 0x04, 0x01, i18n("Multimedia audio controller")}, + { 0x04, 0x02, i18n("Computer telephony device")}, + { 0x04, 0x03, i18n("Audio device")}, + { 0x04, 0x80, i18n("Multimedia controller")}, + { 0x04, -1, i18n("Unknown multimedia controller")}, + + { 0x05, 0x00, i18n("RAM memory")}, + { 0x05, 0x01, i18n("FLASH memory")}, + { 0x05, 0x80, i18n("Memory controller")}, + { 0x05, -1, i18n("Unknown memory controller")}, + + { 0x06, 0x00, i18n("Host bridge")}, + { 0x06, 0x01, i18n("ISA bridge")}, + { 0x06, 0x02, i18n("EISA bridge")}, + { 0x06, 0x03, i18n("MicroChannel bridge")}, + { 0x06, 0x04, i18n("PCI bridge")}, + { 0x06, 0x05, i18n("PCMCIA bridge")}, + { 0x06, 0x06, i18n("NuBus bridge")}, + { 0x06, 0x07, i18n("CardBus bridge")}, + { 0x06, 0x08, i18n("RACEway bridge")}, + { 0x06, 0x09, i18n("Semi-transparent PCI-to-PCI bridge")}, + { 0x06, 0x0A, i18n("InfiniBand to PCI host bridge")}, + { 0x06, 0x80, i18n("Bridge")}, + { 0x06, -1, i18n("Unknown bridge")}, + + { 0x07, 0x00, i18n("Serial controller")}, + { 0x07, 0x01, i18n("Parallel controller")}, + { 0x07, 0x02, i18n("Multiport serial controller")}, + { 0x07, 0x03, i18n("Modem")}, + { 0x07, 0x04, i18n("GPIB controller")}, + { 0x07, 0x05, i18n("Smart card controller")}, + { 0x07, 0x80, i18n("Communication controller")}, + { 0x07, -1, i18n("Unknown communication controller")}, + + { 0x08, 0x00, i18n("PIC")}, + { 0x08, 0x01, i18n("DMA controller")}, + { 0x08, 0x02, i18n("Timer")}, + { 0x08, 0x03, i18n("RTC")}, + { 0x08, 0x04, i18n("PCI Hot-plug controller")}, + { 0x08, 0x05, i18n("SD Host controller")}, + { 0x08, 0x06, i18n("SD Host controller")}, + { 0x08, 0x80, i18n("IOMMU")}, + { 0x08, -1, i18n("Unknown system peripheral")}, + + { 0x09, 0x00, i18n("Keyboard controller")}, + { 0x09, 0x01, i18n("Digitizer Pen")}, + { 0x09, 0x02, i18n("Mouse controller")}, + { 0x09, 0x03, i18n("Scanner controller")}, + { 0x09, 0x04, i18n("Gameport controller")}, + { 0x09, 0x80, i18n("Input device controller")}, + { 0x09, -1, i18n("Unknown input device controller")}, + + { 0x0A, 0x00, i18n("Generic docking station")}, + { 0x0A, 0x80, i18n("Docking station")}, + { 0x0A, -1, i18n("Unknown docking station")}, + + { 0x0B, 0x00, i18n("386")}, + { 0x0B, 0x01, i18n("486")}, + { 0x0B, 0x02, i18n("Pentium")}, + { 0x0B, 0x10, i18n("Alpha")}, + { 0x0B, 0x20, i18n("Power PC")}, + { 0x0B, 0x30, i18n("MIPS")}, + { 0x0B, 0x40, i18n("Co-processor")}, + { 0x0B, -1, i18n("Unknown processor")}, + + { 0x0C, 0x00, i18n("FireWire (IEEE 1394)")}, + { 0x0C, 0x01, i18n("ACCESS bus")}, + { 0x0C, 0x02, i18n("SSA")}, + { 0x0C, 0x03, i18n("USB controller")}, + { 0x0C, 0x04, i18n("Fibre channel")}, + { 0x0C, 0x05, i18n("SMBus")}, + { 0x0C, 0x06, i18n("InfiniBand")}, + { 0x0C, 0x07, i18n("IPMI interface")}, + { 0x0C, 0x08, i18n("SERCOS interface")}, + { 0x0C, 0x09, i18n("CANbus")}, + { 0x0C, -1, i18n("Unknown serial bus controller")}, + + { 0x0D, 0x00, i18n("IRDA controller")}, + { 0x0D, 0x01, i18n("Consumer IR controller")}, + { 0x0D, 0x10, i18n("RF controller")}, + { 0x0D, 0x11, i18n("Bluetooth")}, + { 0x0D, 0x12, i18n("Broadband")}, + { 0x0D, 0x20, i18n("Ethernet (802.11a - 5 GHz)")}, + { 0x0D, 0x21, i18n("Ethernet (802.11b - 2.4 GHz)")}, + { 0x0D, 0x80, i18n("Wireless controller")}, + { 0x0D, -1, i18n("Unknown wireless controller")}, + + { 0x0E, 0x00, i18n("I2O")}, + { 0x0E, -1, i18n("Unknown intelligent controller")}, + + { 0x0F, 0x01, i18n("Satellite TV controller")}, + { 0x0F, 0x02, i18n("Satellite audio communication controller")}, + { 0x0F, 0x03, i18n("Satellite voice communication controller")}, + { 0x0F, 0x04, i18n("Satellite data communication controller")}, + { 0x0F, -1, i18n("Unknown satellite communications controller")}, + + { 0x10, 0x00, i18n("Network and computing encryption device")}, + { 0x10, 0x10, i18n("Entertainment encryption device")}, + { 0x10, 0x80, i18n("Encryption controller")}, + { 0x10, -1, i18n("Unknown encryption controller")}, + + { 0x11, 0x00, i18n("DPIO module")}, + { 0x11, 0x01, i18n("Performance counters")}, + { 0x11, 0x10, i18n("Communication synchronizer")}, + { 0x11, 0x20, i18n("Signal processing management")}, + { 0x11, 0x80, i18n("Signal processing controller")}, + { 0x11, -1, i18n("Unknown signal processing controller")}, + + { 0x12, 0x00, i18n("Processing accelerators")}, + { 0x12, -1, i18n("Unknown processing accelerator")}, + + { -1, -1, i18n("Unknown subdevice class")} }; //keep -1 in last position in "id", //in last position in "id2" with certain "id", //and in last position in "id3" with certain "id2" //device programming interface list -static const id4name devInterface[]={ { 0x01, 0x05, 0x20, i18n("single DMA")}, - { 0x01, 0x05, 0x30, i18n("chained DMA")}, - - { 0x03, 0x00, 0x00, i18n("VGA compatible")}, - { 0x03, 0x00, 0x01, i18n("8514 compatible")}, - - { 0x06, 0x04, 0x00, i18n("Normal decode")}, - { 0x06, 0x04, 0x01, i18n("Subtractive decode")}, - - { 0x06, 0x08, 0x00, i18n("Transparent mode")}, - { 0x06, 0x08, 0x01, i18n("Endpoint mode")}, - - { 0x06, 0x09, 0x40, i18n("Primary bus towards host CPU")}, - { 0x06, 0x09, 0x40, i18n("Secondary bus towards host CPU")}, - - { 0x07, 0x00, 0x00, i18n("8250")}, - { 0x07, 0x00, 0x01, i18n("16450")}, - { 0x07, 0x00, 0x02, i18n("16550")}, - { 0x07, 0x00, 0x03, i18n("16650")}, - { 0x07, 0x00, 0x04, i18n("16750")}, - { 0x07, 0x00, 0x05, i18n("16850")}, - { 0x07, 0x00, 0x06, i18n("16950")}, - - { 0x07, 0x01, 0x00, i18n("SPP")}, - { 0x07, 0x01, 0x01, i18n("BiDir")}, - { 0x07, 0x01, 0x02, i18n("ECP")}, - { 0x07, 0x01, 0x03, i18n("IEEE1284")}, - { 0x07, 0x01, 0xFE, i18n("IEEE1284 Target")}, - - { 0x07, 0x03, 0x00, i18n("Generic")}, - { 0x07, 0x03, 0x01, i18n("Hayes/16450")}, - { 0x07, 0x03, 0x02, i18n("Hayes/16550")}, - { 0x07, 0x03, 0x03, i18n("Hayes/16650")}, - { 0x07, 0x03, 0x04, i18n("Hayes/16750")}, - - { 0x08, 0x00, 0x00, i18n("8259")}, - { 0x08, 0x00, 0x01, i18n("ISA PIC")}, - { 0x08, 0x00, 0x02, i18n("EISA PIC")}, - { 0x08, 0x00, 0x03, i18n("IO-APIC")}, - { 0x08, 0x00, 0x04, i18n("IO(X)-APIC")}, - - { 0x08, 0x01, 0x00, i18n("8237")}, - { 0x08, 0x01, 0x01, i18n("ISA DMA")}, - { 0x08, 0x01, 0x01, i18n("EISA DMA")}, - - { 0x08, 0x02, 0x00, i18n("8254")}, - { 0x08, 0x02, 0x01, i18n("ISA timer")}, - { 0x08, 0x02, 0x01, i18n("EISA timers")}, - - { 0x08, 0x03, 0x00, i18n("Generic")}, - { 0x08, 0x03, 0x01, i18n("ISA RTC")}, - - { 0x09, 0x04, 0x00, i18n("Generic")}, - { 0x09, 0x04, 0x01, i18n("Extended")}, - - { 0x0C, 0x00, 0x00, i18n("Generic")}, - { 0x0C, 0x00, 0x01, i18n("OHCI")}, - - { 0x0C, 0x03, 0x00, i18n("UHCI")}, - { 0x0C, 0x03, 0x10, i18n("OHCI")}, - { 0x0C, 0x03, 0x20, i18n("EHCI")}, - { 0x0C, 0x03, 0x80, i18n("Unspecified")}, - { 0x0C, 0x03, 0xFE, i18n("USB Device")}, - - { 0x0C, 0x07, 0x00, i18n("SMIC")}, - { 0x0C, 0x07, 0x01, i18n("Keyboard controller style")}, - { 0x0C, 0x07, 0x02, i18n("Block transfer")}, - - { -1, -1, -1, i18n(strUnknown)} +static const id4name devInterface[]={ { 0x01, 0x01, 0x00, i18n("ISA Compatibility mode-only controller")}, + { 0x01, 0x01, 0x05, i18n("PCI native mode-only controller")}, + { 0x01, 0x01, 0x0A, i18n("ISA Compatibility mode controller, supports both channels switched to PCI native mode")}, + { 0x01, 0x01, 0x0F, i18n("PCI native mode controller, supports both channels switched to ISA compatibility mode")}, + { 0x01, 0x01, 0x80, i18n("ISA Compatibility mode-only controller, supports bus mastering")}, + { 0x01, 0x01, 0x85, i18n("PCI native mode-only controller, supports bus mastering")}, + { 0x01, 0x01, 0x8A, i18n("ISA Compatibility mode controller, supports both channels switched to PCI native mode, supports bus mastering")}, + { 0x01, 0x01, 0x8F, i18n("PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering")}, + + { 0x01, 0x05, 0x20, i18n("ADMA single stepping")}, + { 0x01, 0x05, 0x30, i18n("ADMA continuous operation")}, + + { 0x01, 0x06, 0x00, i18n("Vendor specific")}, + { 0x01, 0x06, 0x01, i18n("AHCI 1.0")}, + { 0x01, 0x06, 0x02, i18n("Serial Storage Bus")}, + + { 0x01, 0x07, 0x01, i18n("Serial Storage Bus")}, + + { 0x01, 0x08, 0x01, i18n("NVMHCI")}, + { 0x01, 0x08, 0x02, i18n("NVM Express")}, + + { 0x03, 0x00, 0x00, i18n("VGA controller")}, + { 0x03, 0x00, 0x01, i18n("8514 controller")}, + + { 0x06, 0x04, 0x00, i18n("Normal decode")}, + { 0x06, 0x04, 0x01, i18n("Subtractive decode")}, + + { 0x06, 0x08, 0x00, i18n("Transparent mode")}, + { 0x06, 0x08, 0x01, i18n("Endpoint mode")}, + + { 0x06, 0x09, 0x40, i18n("Primary bus towards host CPU")}, + { 0x06, 0x09, 0x40, i18n("Secondary bus towards host CPU")}, + + { 0x07, 0x00, 0x00, i18n("8250")}, + { 0x07, 0x00, 0x01, i18n("16450")}, + { 0x07, 0x00, 0x02, i18n("16550")}, + { 0x07, 0x00, 0x03, i18n("16650")}, + { 0x07, 0x00, 0x04, i18n("16750")}, + { 0x07, 0x00, 0x05, i18n("16850")}, + { 0x07, 0x00, 0x06, i18n("16950")}, + + { 0x07, 0x01, 0x00, i18n("SPP")}, + { 0x07, 0x01, 0x01, i18n("BiDir")}, + { 0x07, 0x01, 0x02, i18n("ECP")}, + { 0x07, 0x01, 0x03, i18n("IEEE1284")}, + { 0x07, 0x01, 0xFE, i18n("IEEE1284 Target")}, + + { 0x07, 0x03, 0x00, i18n("Generic")}, + { 0x07, 0x03, 0x01, i18n("Hayes/16450")}, + { 0x07, 0x03, 0x02, i18n("Hayes/16550")}, + { 0x07, 0x03, 0x03, i18n("Hayes/16650")}, + { 0x07, 0x03, 0x04, i18n("Hayes/16750")}, + + { 0x08, 0x00, 0x00, i18n("8259")}, + { 0x08, 0x00, 0x01, i18n("ISA PIC")}, + { 0x08, 0x00, 0x02, i18n("EISA PIC")}, + { 0x08, 0x00, 0x03, i18n("IO-APIC")}, + { 0x08, 0x00, 0x04, i18n("IO(X)-APIC")}, + + { 0x08, 0x01, 0x00, i18n("8237")}, + { 0x08, 0x01, 0x01, i18n("ISA DMA")}, + { 0x08, 0x01, 0x01, i18n("EISA DMA")}, + + { 0x08, 0x02, 0x00, i18n("8254")}, + { 0x08, 0x02, 0x01, i18n("ISA timer")}, + { 0x08, 0x02, 0x02, i18n("EISA timers")}, + { 0x08, 0x02, 0x03, i18n("HPET")}, + + { 0x08, 0x03, 0x00, i18n("Generic")}, + { 0x08, 0x03, 0x01, i18n("ISA RTC")}, + + { 0x09, 0x04, 0x00, i18n("Generic")}, + { 0x09, 0x04, 0x01, i18n("Extended")}, + + { 0x0C, 0x00, 0x00, i18n("Generic")}, + { 0x0C, 0x00, 0x01, i18n("OHCI")}, + + { 0x0C, 0x03, 0x00, i18n("UHCI")}, + { 0x0C, 0x03, 0x10, i18n("OHCI")}, + { 0x0C, 0x03, 0x20, i18n("EHCI")}, + { 0x0C, 0x03, 0x20, i18n("XHCI")}, + { 0x0C, 0x03, 0x80, i18n("Unspecified")}, + { 0x0C, 0x03, 0xFE, i18n("USB Device")}, + + { 0x0C, 0x07, 0x00, i18n("SMIC")}, + { 0x0C, 0x07, 0x01, i18n("Keyboard controller style")}, + { 0x0C, 0x07, 0x02, i18n("Block transfer")}, + + { -1, -1, -1, i18n(strUnknown)} }; //keep -1 in last position //capabilities list static const id2name capNames[]={{ 0x01, i18n("Power management")}, - { 0x02, i18n("AGP")}, - { 0x03, i18n("Vital product data")}, - { 0x04, i18n("Slot identification")}, - { 0x05, i18n("Message signaled interrupts")}, - { 0x06, i18n("CompactPCI hot swap")}, - { 0x07, i18n("PCI-X")}, - { 0x08, i18n("HyperTransport")}, - { 0x09, i18n("Vendor specific")}, - { 0x0A, i18n("Debug port")}, - { 0x0B, i18n("CompactPCI central resource control")}, - { 0x0C, i18n("PCI hot-plug")}, - { 0x0E, i18n("AGP x8")}, - { 0x0F, i18n("Secure device")}, - { 0x10, i18n("PCI express")}, - { 0x11, i18n("MSI-X")}, - { -1, i18n(strUnknown)} + { 0x02, i18n("AGP")}, + { 0x03, i18n("Vital product data")}, + { 0x04, i18n("Slot identification")}, + { 0x05, i18n("Message signaled interrupts")}, + { 0x06, i18n("CompactPCI hot swap")}, + { 0x07, i18n("PCI-X")}, + { 0x08, i18n("HyperTransport")}, + { 0x09, i18n("Vendor specific")}, + { 0x0A, i18n("Debug port")}, + { 0x0B, i18n("CompactPCI central resource control")}, + { 0x0C, i18n("PCI hot-plug")}, + { 0x0E, i18n("AGP x8")}, + { 0x0F, i18n("Secure device")}, + { 0x10, i18n("PCI express")}, + { 0x11, i18n("MSI-X")}, + { 0x13, i18n("PCI Advanced Features")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //device selection timing static const id2name devSel[]={ { 0x00, i18n("Fast")}, - { 0x01, i18n("Medium")}, - { 0x02, i18n("Slow")}, - { -1, i18n(strUnknown)} + { 0x01, i18n("Medium")}, + { 0x02, i18n("Slow")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //mapping type static const id2name mappingType[]={{ 0x00, i18n("32 bit")}, - { 0x01, i18n("Below 1M")}, - { 0x02, i18n("64 bit")}, - { -1, i18n(strUnknown)} + { 0x01, i18n("Below 1M")}, + { 0x02, i18n("64 bit")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //header type static const id2name headerType[]={ { 0x00, i18n("Standard")}, - { 0x01, i18n("Bridge")}, - { 0x02, i18n("CardBus")}, - { -1, i18n(strUnknown)} + { 0x01, i18n("Bridge")}, + { 0x02, i18n("CardBus")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //AGP rate static const id2name agpRate[]={{ 0x01, i18n("1X")}, - { 0x02, i18n("2X")}, - { 0x03, i18n("1X & 2X")}, - { 0x04, i18n("4X")}, - { 0x05, i18n("1X & 4X")}, - { 0x06, i18n("2X & 4X")}, - { 0x07, i18n("1X & 2X & 4X")}, - { 0x09, i18n("4X")}, - { 0x0A, i18n("8X")}, - { 0x0B, i18n("4X & 8X")}, - { -1, i18n(strUnknown)} + { 0x02, i18n("2X")}, + { 0x03, i18n("1X & 2X")}, + { 0x04, i18n("4X")}, + { 0x05, i18n("1X & 4X")}, + { 0x06, i18n("2X & 4X")}, + { 0x07, i18n("1X & 2X & 4X")}, + { 0x09, i18n("4X")}, + { 0x0A, i18n("8X")}, + { 0x0B, i18n("4X & 8X")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //AGP calibrating cycle static const id2name calCycle[]={ { 0x00, i18n("4 ms")}, - { 0x01, i18n("16 ms")}, - { 0x02, i18n("64 ms")}, - { 0x03, i18n("256 ms")}, - { 0x07, i18n("Not needed")}, - { -1, i18n(strUnknown)} + { 0x01, i18n("16 ms")}, + { 0x02, i18n("64 ms")}, + { 0x03, i18n("256 ms")}, + { 0x07, i18n("Not needed")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //PM auxiliary current static const id2name auxCur[]={ { 0x00, i18n("0 (self powered)")}, - { 0x01, i18n("55 mA")}, - { 0x02, i18n("100 mA")}, - { 0x03, i18n("160 mA")}, - { 0x04, i18n("220 mA")}, - { 0x05, i18n("270 mA")}, - { 0x06, i18n("320 mA")}, - { 0x07, i18n("375 mA")}, - { -1, i18n(strUnknown)} + { 0x01, i18n("55 mA")}, + { 0x02, i18n("100 mA")}, + { 0x03, i18n("160 mA")}, + { 0x04, i18n("220 mA")}, + { 0x05, i18n("270 mA")}, + { 0x06, i18n("320 mA")}, + { 0x07, i18n("375 mA")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //PM power state static const id2name powerState[]={ { 0x00, i18n("D0")}, - { 0x01, i18n("D1")}, - { 0x02, i18n("D2")}, - { 0x03, i18n("D3 hot")}, - { -1, i18n(strUnknown)} + { 0x01, i18n("D1")}, + { 0x02, i18n("D2")}, + { 0x03, i18n("D3 hot")}, + { -1, i18n(strUnknown)} }; //keep -1 in last position //MSI multiple message static const id2name multipleMessage[]={{ 0x00, i18n("1 vector")}, - { 0x01, i18n("2 vectors")}, - { 0x02, i18n("4 vectors")}, - { 0x03, i18n("8 vectors")}, - { 0x04, i18n("16 vectors")}, - { 0x05, i18n("32 vectors")}, - { -1, i18n(strUnknown)} + { 0x01, i18n("2 vectors")}, + { 0x02, i18n("4 vectors")}, + { 0x03, i18n("8 vectors")}, + { 0x04, i18n("16 vectors")}, + { 0x05, i18n("32 vectors")}, + { -1, i18n(strUnknown)} }; static const QString& getNameById(const id2name *const table,int id);